HYNIX HMCG84AHBRA E/R 1R*4 32Gb, Low Profile, DDR5 6400 SDRAM RDIMM

Descripci車n Corta IDC-MAYORISTA:

• Features

  • DRAM VDD/VDDQ = 1.1V (-33mV / +67mV)
  • DRAM VPP = 1.8V (–54mV / +108mV)
  • 32 Bank with x4/x8
  • 16 Bank with x16
  • 8 BG(Bank Group) for X4/X8/X16 configurations
  • BL16, BC8 OTF, BL32, BL32 OTF supported
  • Temperature Encoding
  • Same Bank Refresh
  • VrefDQ / VrefCA / VrefCS Training
  • Hard/Soft Post Package Repair
  • Input Clock Frequency Change
  • Maximum Power Saving Mode (MPSM)
  • Multi-Purpose Command (MPC)
  • Per DRAM Addressability (PDA)
  • Read Training Mode
  • CA Training Mode
  • CS Training Mode
  • Per Pin VREFDQ Training
  • Write Leveling Training Mode
  • Connectivity Test (CT)
  • ZQ Calibration
  • DFE (Decision Feedback Equalization) for DQ
  • DQS Interval Oscillator
  • 1N / 2N Mode support for Commands
  • On-Die ECC
  • ECC Transparency and Error Scrub
  • CRC (Cyclic Redundancy Check)
  • Loopback for multiple purposes -monitor data, BER(Bit Error Rate) analysis, etc.
  • Package Output Driver Test Mode
  • Training Modes:
  • VrefDQ / VrefCA / VrefCS Training
  • Read Training Mode
  • CA Training Mode
  • CS Training Mode
  • Per Pin VREFDQ Training
  • Write Leveling Training Mode
  • Duty Cycle Adjuster (DCA) for Read -Global
  • Per Pin DCA(Duty Cycle Adjuster) for Read -Per Pin(DQ)
  • NOT required RFM

• Density: 32GB
• Organization: 4Gx80
• Component Composition: 4Gx8(H5CG44AHBDXxxx)*20
• # of ranks: 1
• MT/s: DDR5-6400
• Grade: HB
• tCK (ns): 0.312
• CAS Latency (tCK): 16
• tRCD (ns): 16
• tRP (ns): 16
• tRAS (ns): 32
• tRC (ns): 48
• CL-tRCD-tRP: 52-52-52